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Digital-to-Analogue Converters (DACs)

Published On:
Nov 3, 2020
Last Updated:
Sep 22, 2026

A digital-to-analogue converter (DAC) takes a digital code, typically written by a microcontroller over SPI or I2C, and produces a proportional analogue voltage or current. They are used anywhere a digital system has to produce a continuously-variable output, e.g. setting a bias voltage, generating a waveform, or driving a control loop. The reverse operation is performed by an ADC.

Architectures

When looking for a DAC for your next project, you might stumble across a few different DAC types (or architectures). Whilst they all achieve the same basic end goal of converting a digital value into an analogue one, it pays to understand the different internal designs to choose the one that best suits your need. The most common DAC architectures are:

  • String DAC (Kelvin Divider DAC)
  • R-2R DAC (Voltage Switching DAC)
  • Multiplying DAC (MDAC)
  • Delta-Sigma

Any of these architectures can be unipolar or bipolar. Unipolar (a.k.a. single supply) DACs produce an output of one polarity only (usually 0 V0\unit{V} up to full-scale), while bipolar DACs can output both negative and positive voltages.

We will discuss these further in the following sections.

String DAC (Kelvin Divider)

The string DAC (a.k.a. Kelvin divider DAC) is the easiest DAC design to understand, and is just a string of equal-valued resistors from VREFV_{REF} to GNDGND, with taps off each junction to the output.

The internal architecture of a string DAC.

An nn-bit string DAC requires 2n−12^n - 1 resistors. This is a sensible number for lower resolutions of 8-10 bits, but soon gets prohibitively high for higher resolutions. For example:

  • 8-bit DAC: 255 resistors
  • 10-bit DAC: 1023 resistors
  • 12-bit DAC: 4095 resistors
  • 16-bit DAC: 65535 resistors!!!

A string DAC is very dependent on well matched resistors to achieve good linearity. A string DAC has low glitch error.

R-2R DAC (Voltage Switching DAC)

The R-2R (or R-2R ladder) architecture achieves high resolution using only two resistor values (RR and 2R2R), needing far fewer resistors than a string DAC of the same bit count.

The internal architecture of an R-2R DAC.

An nn-bit R-2R DAC requires 2n2n resistors1.

An R-2R DAC can have large glitch errors, due to timing differences in the switches which connect junctions to either VREFV_{REF} or GNDGND.

Multiplying DAC (MDAC)

The multiplying DAC (MDAC) architecture is very similar to the R-2R architecture. What makes it a “multiplying” DAC is that the reference is treated as an analogue input rather than a fixed DC rail, so the output is proportional to the product of the reference and the digital code. This makes an MDAC useful as a digitally-controlled attenuator or programmable gain element. Four-quadrant MDACs accept a bipolar (and possibly AC) reference.

Delta-Sigma

Delta-Sigma (or Sigma-Delta) DACs provide the highest resolution of any common architecture. You typically find them with a resolution of 18-24 bits. Note that high resolution is not the same as high DC accuracy; precision segmented and R-2R parts can have better INL. Delta-Sigma dominates audio and other AC applications.

Output Types

  • Buffered voltage outputs: The output from the digital-to-analogue conversion circuitry is fed into an op-amp to buffer the circuitry, lowering the output impedance and making the output less sensitive to current draw and noise.
  • Unbuffered voltage outputs: No op-amp is added to buffer the output voltage.

Voltage References

The voltage reference is a very important piece of a DAC circuit. The voltage reference provides the full-scale voltage that the DAC will output (or a fixed multiplier of the full-scale output if there is an output buffer with multiplier). It is important to consider the accuracy of the voltage reference over temperature changes. Typically an error in ppm/∘C\mathrm{ppm/^\circ C} is provided, with a value of 10–100 ppm/∘C10\text{–}100\unit{ppm/^\circ C} being normal.

Internal Voltage References

Many DACs come with built in internal voltage references (as well as allowing you to connect an external voltage reference if required).

External Voltage References

Most DACs have a requirement for the external voltage reference to be no less than approx. 1 V1\unit{V}.

Datasheet Specifications

A graph showing how the DAC output voltage varies with the digital input code, and the various names given to parts of the behaviour.

Resolution

This is normally given as the number of bits. This determines what the smallest output step change will be in-response to the smallest digital code change (and change in the LSB). For example, a 10-bit DAC has 210=10242^{10} = 1024 output levels (1023 steps), and so the smallest output step change will be 1/10241/1024 of the reference voltage. Not to be confused with accuracy.

Monotonicity

Typically when specified as a number of bits, this is the number of bits which are guaranteed to give a monotonic increase in the output voltage. Monotonicity is when the output always increases or stays the same (never decreases) as the digital codes increase. For example, a 16-bit DAC may have monotonicity guaranteed for the first 12 bits (MSBs).

Zero Code Error

Voltage when the DAC is instructed to output 0 V0\unit{V} (the zero code). Typically 0.5–10 mV0.5\text{–}10\unit{mV}. In a unipolar DAC, this is the same as the offset error. In a bipolar DAC, this is different to the offset error.

Offset Error

The difference between the ideal output and measured output at the lowest possible voltage. For a unipolar DAC the lowest possible voltage is 0 V0\unit{V}, so this is the same as the zero code error. For a bipolar DAC, this will be the most negative voltage and different from the zero code error.

Gain Error

The deviation of the slope of the transfer function from ideal, measured after the offset error has been removed. It is normally quoted as a percentage of the full-scale range, or in LSBs at full scale. Offset error shifts the whole transfer function up or down, whilst gain error rotates it (see the graph above).

Output Power-Up Voltage

Within a family of DACs, sometimes there are different physical variants of the IC which will output different voltages on power-up. The most common output voltage is 0 V0\unit{V} on start-up.

DC Output Impedance

Most buffered output DACs will be able to sink/source current (push/pull) and so the output impedance will be applicable over negative and positive current ranges. Typically 50–200 mΩ50\text{–}200\unit{m\Omega}.

Integral Non-linearity (INL, aka Relative Accuracy)

Integral non-linearity (INL, also called relative accuracy) is a measure of the difference between the actual output voltage and ideal output voltage for a particular digital input code. It is measured after offset and gain errors are compensated for. To compensate for this, the “ideal output voltage” has to be determined. Confusingly, there are two different ways the “ideal output voltage” may be calculated:

  1. End point line: A line through the minimum and maximum output voltages of the DAC. The error will be 0 for the first and last points. Sometimes, because of additional errors near the end-points, the line is taken between two codes offset from the extreme limits of the DAC. For example, the 12-bit Texas Instruments DAC7678 DAC provides a relative accuracy measured by a line passing through codes 30 and 4050 (with code 4095 being the upper-limit for a 12-bit DAC)2.

  2. Best fitting line: A line fitted using linear least-squares regression.

The integral non-linearity for digital input code 010 is shown. Note how the ‘ideal line’ has been offset and gain compensated for, in this case by going through the DAC’s min. and max. output voltages.

INL is normally quoted in LSBs rather than volts, which is achieved by dividing the INL in volts by the voltage of one LSB.

INLLSB=INLvoltsVLSB\begin{align*} INL_{LSB} = \frac{INL_{volts}}{V_{LSB}} \end{align*}

For example, if the INLvoltsINL_{volts} was 4.3 mV4.3\unit{mV}, the DAC was 10-bit and went from 0 V0\unit{V} to 2.5 V2.5\unit{V}, then:

INLLSB=4.3 mV2.5 V210=4.3 mV2.44 mV=1.8 LSB\begin{align*} INL_{LSB} &= \frac{4.3\unit{mV}}{\frac{2.5\unit{V}}{2^{10}}} \\ &= \frac{4.3\unit{mV}}{2.44\unit{mV}} \\ &= 1.8\unit{LSB} \end{align*}

Differential Non-linearity (DNL)

Differential non-linearity measures the deviation from ideal in two analogue output values corresponding to two adjacent digital input values. For example, if the analogue output voltage changes by 1.2 LSB1.2\unit{LSB} when the digital input increments by 1 LSB1\unit{LSB} (the smallest step size), then the differential non-linearity is 0.2 LSB0.2\unit{LSB}. The value specified in the DAC datasheet is the worst-case differential non-linearity for any input step change.

The differential non-linearity for any step is given by:

DNL(i)=Vout(i+1)−Vout(i)ideal LSB output−1\begin{align*} DNL(i) = \frac{V_{out}(i + 1) - V_{out}(i)}{\text{ideal LSB output}} - 1 \end{align*}

And then the value given on the datasheet is just the maximum DNLDNL across the whole operating range:

DNLmax=max⁡i(∣DNL(i)∣)\begin{align*} DNL_{max} = \max_{i} \left( |DNL(i)| \right) \end{align*}

A differential non-linearity more negative than −1 LSB-1\unit{LSB} means the output actually decreases as the code increases, i.e. the transfer function is no longer monotonic. (A large positive DNL just gives an oversized step, it cannot cause non-monotonicity. The equivalent failure in an ADC is a missing code.)

Total Unadjusted Error (TUE)

No, DACs do not have more error on a Tuesday. Total unadjusted error (TUE) is an error metric of a DAC which combines the INL, gain and offset errors into a single metric.

eTUE=eINL2+egain2+eoffset2\begin{align*} e_{TUE} = \sqrt{ e_{INL}^2 + e_{gain}^2 + e_{offset}^2 } \end{align*}

This equation only holds true if the three noise sources are uncorrelated and each follow a normal distribution.

Settling Time

The time taken, after a change in the digital input code, for the output to settle to within a specified error band (commonly ±0.5 LSB\pm0.5\unit{LSB} or ±1 LSB\pm1\unit{LSB}) of its final value. It is usually dominated by the slew rate of the output buffer and any capacitance on the output pin, and is normally specified for a full-scale code change (the worst case). Settling time sets the maximum useful update rate of the DAC.

Glitch Energy

Ideally, the output of a DAC would move smoothly from one voltage level to another when the input code is changed. In reality, because the output voltage is determined by discrete switching elements, and each switching element may have slightly different switching times, the output voltage can swing/spike to unexpected voltages while the DAC is transitioning. Even if the internal DAC switches could switch instantaneously, they may be purposely designed with break-before-make behaviour to prevent current shorts in the internal circuitry (very similar to the concept of dead-time in an H-bridge). String DACs have small glitch energies, while R-2R DACs produce large glitch energies.

A simple way to reduce the glitch energy is to add a large capacitor on the output of the DAC. This capacitor, driven by the output impedance of the DAC, will create a low-pass filter and reduce the amplitude of the glitch. However, this capacitor can also slow the settling time of the DAC, which might be undesirable in high-frequency applications.

Another way to reduce the glitch energy is to add an external track/hold amplifier to the output of the DAC. This method can almost completely get rid of any glitching, however it requires additional circuitry and complex timing control between the DAC and track/hold amplifier3.

Voice Coil Motor (VCM) DACs

Some DACs are specifically designed to drive voice coil motors (VCMs) for auto-focus in camera modules. One feature they have that most DACs don’t is high current sinking capabilities, typically in the tens or hundreds of milliamps. This is so they can drive the autofocus motor directly. Based on a few internal block diagrams I could find most use a low-side MOSFET and current sensing resistor feeding back to an op-amp to control the gate voltage (classic and easy way to do a simple current sink).

The internal block diagram of the Aimtron AT5510 10-bit DAC designed for driving VCMs.4

One example is the DW9807 DAC from Dongwoon Anatech, which is used in the Arducam 1/1.32” 64MP auto focus camera module that contains the OwlSight OV64A40 64MP image sensor. Surprisingly, I couldn’t find much information about this part online (and no datasheet), so perhaps it’s only shared with OEMs?

Manufacturer Part Families

  • AD5: Analog Devices’ main range of DACs (the AD7 prefix is mostly used for their ADCs).
    • AD5683: 16-bit, single-channel, buffered voltage-output DAC with SPI interface.
  • LTC: Range of DACs by Linear Technology (now owned by Analog Devices).
    • LTC2664: Quad 12-/16-bit voltage-output DAC with integrated reference.
  • DAC: Texas Instruments’ range of DACs.
    • DAC7678: 12-bit, octal-channel, voltage-output DAC with internal reference.

Footnotes

  1. Walt Kester. MT-015 Tutorial: Basic DAC Architectures II: Binary DACs [tutorial]. Analog Devices. Retrieved 2020-11-03, from https://www.analog.com/media/ru/training-seminars/tutorials/MT-015.pdf. ↩

  2. Texas Instruments. DAC7678: 12-Bit, Octal Channel, Ultra-Low Glitch, Voltage Output Digital-to-Analog Converter with 2.5V, 2ppm/°C Internal Reference [datasheet]. Texas Instruments. Retrieved 2021-01-29, from https://www.ti.com/lit/ds/symlink/dac7678.pdf. ↩

  3. Maxim Integrated. Application Note 583: Deglitching Techniques for High-Voltage R-2R DACs [application note]. Analog Devices. Retrieved 2021-01-21, from https://www.analog.com/en/technical-articles/deglitching-techniques-for-highvoltage-r2r-dacs.html. ↩

  4. Aimtron Technology (2007, Sep 20). AT5510: 120mA, Current Sinking, 10-bit I2C DAC for VCM Driver (Preliminary Product Information, Rev. 0.2) [datasheet]. Retrieved 2026-09-22, from https://www.alldatasheet.com/datasheet-pdf/view/226765/AIMTRON/AT5510.html. ↩