DigitaltoAnalogue Converters (DACs)
Architectures
When looking for a DAC for your next project, you might stumble across a few different DAC types (or architectures). Whilst they all achieve the same basic end goal of converting a digital value into an analogue one, it pays to understand the different internal designs to choose the one that best suits your need. The most common DAC architectures are:
 String DAC (Kelvin Divider DAC)
 R2R DAC (Voltage Switching DAC)
 Multiplying DAC (MDAC)
 SigmaDelta
Any of these architectures can be unipolar or bipolar. Unipolar (a.k.a. single supply) DACs only convert digital values into either positive or negative values, while bipolar DACs can output both negative and positive output values.
We will discuss these further in the following sections:
String DAC (Kelvin Divider)
The string DAC (a.k.a Kelvin divider DAC) is the the easiest DAC design to understand, and is just a string of equalvalued resistors from $V_{REF}$ to $GND$, with taps of each junction to the output.
A $n$ bit string DAC requires $2^n  1$ resistors. This is a sensible number for lower resolutions of 810 bits, but soon gets prohibitively high for higher resolutions. For example:
 8bit DAC: 255 resistors
 10bit DAC: 1023 resistors
 12bit DAC: 4095 resistors
 16bit DAC: 65535 resistors!!!
A string DAC is very dependent on well matched resistors to achieve good linearity. A string DAC has low glitch error.
R2R DAC (Voltage Switching DAC)
R2R (or R2R ladder) allows for many outputs.
A $n$ bit R2R DAC requires $2N$ resistors^{1}.
A R2R DAC can have large glitch errors, due to timing differences in the switches which connect junctions to either $V_{REF}$ or $GND$.
MDAC
The MDAC architecture is very similar to the R2R architecture.
DeltaSigma
DeltaSigma (or SigmaDelta) DACs provide the highest precision DACs compared to any other common architecture. You typically find SigmaDelta DACs with a resolution of 1824 bits.
Output Types
 Buffered voltage outputs: The output from the digitaltoanalogue conversion circuitry is fed into an opamp to buffer the circuitry, lowering the output impedance and making the output less sensitive to current draw and noise.
 Unbuffered voltage outputs: No opamp is added to buffer the output voltage.
Voltage References
The voltage reference is a very important piece of a DAC circuit. The voltage reference provides the fullscale voltage that the DAC will output (or a fixed multiplier of the fullscale output if there is an output buffer with multiplier). It is important to consider the accuracy of the voltage reference over temperature changes. Typically an error in $ppm/°C$ is provided, with a value of $10100ppm/°C$ being normal.
Internal Voltage References
Many DACs come with built in internal voltage references (as well as allowing you to connect an external voltage reference if required).
External Voltage References
Most DACs have a requirement for the external voltage reference to be no less than approx. 1V.
Datasheet Specifications
Resolution
This is normally given as the number of bits. This determines what the smallest output step change will be inresponse to the smallest digital code change (and change in the LSB). For example, a 10bit DAC will have 2^10=1024 steps, an so the smallest output step change will be 1/1024 of the reference voltage. Not to be confused with accuracy.
Monotonicity
Typically when specified as a number of bits, this is the number of bits which are guaranteed to give a monotonic increase in the output voltage. Monotonicity is when the output always increases or stays the same (never decreases) as the digital codes increase. For example, a 16bit DAC may have monotonicity guaranteed for the first 12 bits (MSBs).
Zero Code Error
Voltage when the DAC is instructed to output 0V (the zero code). Typically 0.510mV. In a unipolar DAC, this is the same as the offset error. In a bipolar DAC, this is different to the offset error.
Offset Error
The different between the ideal output and measured output at the lowest possible voltage. For a unipolar DAC the lowest possible voltage is 0V, so this is the same as the zero code error. For a bipolar DAC, this will be the most negative voltage and different from the zero code error.
Output PowerUp Voltage
Within a family of DACs, sometimes there are different physical variants of the IC which will output different voltages on powerup. The most common output voltage is 0V on startup.
DC Output Impedance
Most buffered output DACs will be able to sink/source current (push/pull) and so the output impedance will be applicable over a negative and positive current ranges. Typically 50200mΩ.
Integral Nonlinearity (INL, aka Relative Accuracy)
Integral nonlinearity (INL, also called relative accuracy) is a measure of the difference between the actual output voltage and ideal output voltage for a particular digital input code. It is measured after offset and gain errors are compensated for. To compensate for this, the typical "ideal output voltage" is to determined. Confusingly, there are two different ways the "ideal output voltage" may be calculated:

End point line: A line through the minimum and maximum output voltages of the DAC. The error will be 0 for the first and last points. Sometimes, because of additional errors near the endpoints, the line is taken between two codes offset from the extreme limits of the DAC. For example, the 12bit Texas Instruments DAC7678 DAC provides a relative accuracy measured by a line passing through codes 30 and 4050 (with code 4095 being the upperlimit for a 12bit DAC)^{2}.

Best fitting line: A line fitted using linear leastsquares regression.
If the INL is given in bits, this is achieved by dividing the INL in volts by the voltage of the LSB.
$\begin{align} INL_{bits} = \frac{INL_{volts}}{V_{LSB}} \end{align}$For example, if the $INL_{volts}$ was 4.3mV, the DAC was 10bit and went from 0V to 2.5V, then:
$\begin{align} INL_{bits} &= \frac{4.3mV}{\frac{2.5V}{2^{10}}} \\ &= \frac{4.3mV}{2.44mV} \\ &= 1.8 bits \end{align}$Differential Nonlinearity (DNL)
Differential nonlinearity measures the deviation from ideal in two analogue output values corresponding to two adjacent digital input values. For example, if the analogue output voltage changes by 1.2LSB when the digital input increments by 1LSB (the smallest step size), then the differential nonlinearity is 0.2LSB. The value specified in the DAC datasheet is the worstcase differential nonlinearity for any input step change.
The differential nonlinearity for any step is given by:
$\begin{align} DNL(i) = \frac{V_{out}(i + 1)  V_{out}(i)}{ideal LSB output}  1 \end{align}$And then the value given on the datasheet is just the maximum $DNL$ across the whole operating range:
$\begin{align} DNL_{max} = max (\sum_{i=0}^{i=n1} DNL(i)) \end{align}$A differential nonlinearity of more than 1LSB may lead to a nonmonotonic transfer function (a.k.a. missing codes).
Total Unadjusted Error (TUE)
No, DACs do not have more error on a Tuesday. Total unadjusted error (TUE) is an error metric of a DAC which combines the INL, gain and offset errors into a single metric.
$\begin{align} e_{TUE} = \sqrt{ e_{INL}^2 + e_{gain}^2 + e_{offset}^2 } \end{align}$This equation only holds true if the three noise sources are uncorrelated and each follow a normal distribution.
Glitch Energy
Ideally, the output of a DAC would move smoothly from one voltage level to another when the input code is changed. In reality, because the output voltage is determined by discrete switching elements, and each switching element may have slightly different switching times, the output voltage can swing/spike to unexpected voltages while the DAC is transitioning. Even if the internal DAC switches could switch instantaneously, they may be purposely designed with breakbeforemake behaviour to prevent current shorts in the internal circuitry (very similar to the concept of deadtime in a Hbridge). Resistor ladder DACs have small glitch energies, while R2R DACs produce large glitch energies.
A simple way to reduce the glitch energy is to add a large capacitor on the output of the DAC. This capacitor, driven by the output impedance of the DAC, will create a lowpass filter and reduce the amplitude of the glitch. However, this capacitor can also slow the settling time of the DAC, which might be undesirable in highfrequency applications.
Another way to reduce the glitch energy is to add a external track/hold amplifier to the output of the DAC. This method can almost completely get rid of any glitching, however it requires additional circuitry and complex timing control between the DAC and track/hold amplifier^{3}.
Manufacturer Part Families
 AD: Range of DACs by Analog Devices
 AD7:
 LTC: Range of DACs by Linear Technology (now owned by Analog Devices).
 LTC2664: Precision reference DAC.
Footnotes

https://www.analog.com/media/ru/trainingseminars/tutorials/MT015.pdf, retrieved 20201103. ↩

https://www.ti.com/lit/ds/symlink/dac7678.pdf, retrieved 20210129. ↩

https://www.maximintegrated.com/en/design/technicaldocuments/appnotes/5/583.html, retrieved 20210121. ↩