Date Published:
Last Modified:


The Advanced eXtensible Interface (AXI) bus is part of the ARM AMBA, a family of open-standard on-chip microcontroller buses first introduced in 1996. The AXI bus was part of the third generation AMBA interface. It is designed for on-chip, high-speed interconnects (sub-micrometer to micrometer connection distance).

The AXI bus is the most widely used AMBA interface. The bus use has long since expanded from just use within microcontrollers, and is now used within SoC’s and FPGAs.


The protocol has separate address/control and data phases. It supports un-aligned data transfers with byte strobes. It uses burst-based data transfers with only the start address provided. It supports out-of-order transaction completion. It has separate read and write channels.

The AXI bus channel architecture. Image from

The AXI bus channel architecture. Image from


As of February 2015, AXI4 was the latest version of the bus. There is also AXI4-Lite.

Like this page? Upvote with shurikens!


    comments powered by Disqus