AXI Bus

Overview

The Advanced eXtensible Interface (AXI) bus is part of the ARM AMBA, a family of open-standard on-chip microcontroller buses first introduced in 1996. The AXI bus was part of the third generation AMBA interface. It is designed forĀ on-chip, high-speed interconnects (sub-micrometer to micrometer connection distance).

The AXI bus is the most widely used AMBA interface. The bus use has long since expanded from just use within microcontrollers, and is now used within SoC’s and FPGAs.

Protocol

The protocol has separate address/control and data phases. It supports un-aligned data transfers with byte strobes. It uses burst-based data transfers with only the start address provided. It supports out-of-order transaction completion. It has separate read and write channels.

The AXI bus channel architecture. Image from http://www.xilinx.com/support/documentation/ip_documentation/axi_ref_guide/v13_4/ug761_axi_reference_guide.pdf.
The AXI bus channel architecture. Image from http://www.xilinx.com/support/documentation/ip_documentation/axi_ref_guide/v13_4/ug761_axi_reference_guide.pdf.

 

Versions

As of February 2015, AXI4 was the latest version of the bus. There is also AXI4-Lite.

Posted: February 17th, 2015 at 9:27 am
Last Updated on: July 5th, 2017 at 12:17 pm